32-bit microcontroller family for power-sensitive applications

The new V850ES/Jx3-L 32-bit microcontroller family has been designed to provide users with huge enhancements in power consumption thanks to the development of advanced new techniques in the device architecture that requires just 0.9mW/DMIPS of power required in active mode. This power saving is achieved by advances in the power control of the Flash memory circuit, which is traditionally the largest consumer of power in a microcontroller, combined with other more established power-efficiency features developed by NEC Electronics.

Power savings are not just restricted to operating modes. In standby mode, very low current operation is accomplished by employing a sub clock internal oscillation circuit combined with sophisticated standby modes enabling the V850ES/Jx3-L to draw as little as 1.5μA.

V850ES/Jx3-L offers no compromise on performance or peripherals. The new microcontroller family benefits from the popular V850ES RISC CPU core, delivering up to 43 Dhrystone 1.1 MIPS and capable of high end mathematical operations running from 5-20MHz thanks to its highly efficient pipeline architecture and integrated DSP functions. Low voltage operation is also offered from 2.2-3.6V whilst remaining tolerant to 5V I/O, hence making an additional cost saving on external level shifters. It provides either 128KB or 256KB of Flash memory and up to 16KB of RAM embedded.

V850ES/Jx3-L also offers a number of on-chip features to reduce component count and system cost, whilst ensuring system robustness. The new microcontroller family includes seven channels of flexible serial communication peripherals, which can be multiplexed in the ports to select a desired mode and number of channels for each, including up to 3 channels UART, 3 channels I2C or 5 channels Clock Serial Interface (CSI). It also contains a built-in CRC (Cyclic Redundancy Check) circuit and an advanced hardware multiplier for faster algorithm execution An external bus interface enables further memory expansion whilst 10 channels of different 16-bit timers with watchdog timer and watch timer, up to 12 channels of A/D conversion, up to two channels of D/A conversion, DMA controller with four independent DMA channels, a two level Low Voltage Detector, Real Time Output port and On-Chip Debug function including interrupt condition complete a highly integrated and highly efficient design.

V850ES/Jx3-L also benefits from pin and functional compatibility to both previous generations of the V850 All Flash range such as V850ES/Jx2, enabling an easy upgrade path to power optimised designs, as well as sister devices from the current generation such as the new V850ES/Jx3 which offers even higher performance and Flash sizes up to 1MB on-chip.

The V850ES/Jx3-L is available in a fine-pitch 12-mm2 LQFP 80-pin package that further contributes to a reduction in the size of portable equipment, as well as a standard 14mm2 version. A 100-pin LQFP device is also available in either fine-pitch 14mm2 or 14 x 20mm versions.

The device is supported by NEC Electronics’ development tool suite including a dedicated starter kit, MINICUBE2 for on-chip debugging, IECUBE for full trace and emulation, and the new PG-FP5 Flash programmer, in conjunction with ‘C’ Compiler suites from our partners IAR Systems and Green Hills.

V850ES/Jx3L is sampling now, with the dedicated starter kit available early in 2008 and mass production ramping up from the second quarter of 2008.