NXP debuts MCX portfolio of microcontrollers for next era of IoT Edge computing

The portfolio includes four series of devices built on a common platform and is supported by the widely adopted MCUXpresso suite of development tools and software. This combined offering allows developers to maximise software reuse across the portfolio to speed development. The portfolio also features the first instantiation of NXP’s new, specialised neural processing unit (NPU) for accelerating inference at the edge, delivering up to 30x faster machine learning throughput compared to a CPU core alone.

Driven by the proliferation of edge devices, the MCU has evolved dramatically over the last few decades. While they are at the heart of many of today’s edge applications, the next generation of intelligent applications will require a new class of MCUs that allow developers to navigate a complex landscape of power, performance and security requirements, as well as connectivity options, while balancing total system cost and energy efficiency. Built on a common foundation of core technologies and supported by a unified software suite for maximal software reuse, the MCX portfolio will enable the flexibility needed to address this challenge. The breadth of the MCX portfolio allows developers to select devices that best fit their application needs, freeing them to invest in differentiating aspects of their design.

“As we approach the milestone of 75 billion connected devices, we are entering a new era of edge computing, requiring us to fundamentally rethink how to best architect a flexible MCU portfolio that is scalable, optimised and can be the foundation for energy efficient industrial and IoT edge applications today and in the decades to come,” said Ron Martino, Executive Vice President and General Manager of Edge Processing for NXP Semiconductors. “By building on our strong legacy in MCUs, this new portfolio will offer the performance and integration needed to address the real-time workloads for the next wave of innovation.”

The four series in the MCX portfolio are designed for ease of use, to simplify migration and to scale up or down as needed with maximal software reuse to minimise development cost. The portfolio is based on high-performance Arm Cortex-M cores and integrates a comprehensive set of peripherals for design flexibility. MCX devices feature up to 4MB of on-chip flash memory, low power cache and advanced memory management controllers, plus up to 1MB of on-chip SRAM to further enhance real-time performance of edge applications.

Machine learning and run-time inference will be supported by NXP’s eIQ ML software development environment. Developers can utilise the easy-to-use tools offered by eIQ to train ML models targeting either the NPU or the CPU core and deploy them on the MCU. MCX families that are built following NXP’s security-by-design approach will offer secure boot with an immutable root-of-trust, hardware accelerated cryptography and, on select families, a built-in EdgeLock secure subsystem.