Wireless
Pentek Announces Digital Downconverter For Wideband Radar And SDR Applications
Pentek has introduced an enhancement to its fastest-ever data acquisition XMC module for the popular Cobalt family. The Model 71641, capable of digitizing one 12-bit channel at 3.6 GHz, or two channels at 1.8 GHz, comes preconfigured with a programmable one- or two-channel digital downconverter loaded into the onboard Xilinx Virtex-6 FPGA. The new module is ideal for wideband radar and software defined radio applications.
The DDC IP Core
Within the Virtex-6 FPGA is a powerful Pentek designed DDC IP core. The core supports single and dual channel modes, accepting data samples from the analog to digital converter at the full 3.6 GHz rate in single-channel mode or 1.8 GHz in two-channel operation.
Each DDC has an independent 32-bit tuning frequency programmable from DC to ’s, where ’s is the A/D sampling frequency. In single channel mode, DDC decimation can be programmed to 8x, 16x or 32x. In dual channel mode, both channels share the same decimation rate, programmable to 4x, 8x or 16x.
The decimating filter for each DDC accepts a unique set of user-supplied 16-bit coefficients. The 80% default filters deliver an output bandwidth of 0.8*’s/N, where N is the decimation setting. In single channel mode the maximum output bandwidth is 360 MHz. Rejection of adjacent-band components within the 80% output bandwidth is better than 100 dB. Each DDC delivers a complex output stream consisting of 24-bit I + 24-bit Q or 16-bit I + 16-bit Q samples at a rate of ’s/N.
Supporting Features and Products
Penteks ReadyFlow Board Support package for Windows, Linux or VxWorks operating systems includes C-callable libraries, drivers and example code for easy access to all of the Model 71641 features.