AI and HBM fuel DRAM market growth

During the memory market winter, DRAM demand bits stayed low, except for AI servers and automotive electronics. Generative AI applications like ChatGPT drove interest in high-speed memory technologies like DDR5 DRAM and HBM, especially in data centres.

Simone Bertolazzi, Ph.D., Principal Analyst, Memory at Yole Group said: “Samsung, SK hynix, and Micron diverted more wafer capacity to HBM to meet demand, slowing overall bit production and increasing undersupply for non-HBM products. HBM wafer production is set to double in 2024.”

Driven by AI computing demand, HBM is expected to outpace the overall DRAM market significantly. HBM bit shipments grew by 93% in 2023 and are projected to grow by 147% in 2024, with a 45% CAGR from 2023 to 2029, while data centre DRAM bits will grow by 25%.

HBM market revenue could rise from $2.7 billion in 2022 to $14 billion in 2024, accounting for 3% and 19% of overall DRAM revenue, respectively.

In this context, the market research & strategy consulting company, Yole Group releases its market & technology report, Next-Generation DRAM 2024 – Focus on HBM and 3D DRAM. In its new memory report, the company provides a detailed analysis of the DRAM market and technology trends with a focus on DRAM scaling, high-bandwidth memory, and monolithic 3D DRAM. Yole Group’s experts comprehensively analyse the market, presents the latest technology trends, and describes the supply chain and the dedicated ecosystem.

From Simone Bertolazzi: “The development of 4F2 DRAM aims to shrink the chip area by approximately 30% compared to existing 6F2 structures, without requiring smaller lithography nodes. Additionally, the adoption of CBA DRAM architectures, where the periphery circuit and memory array are processed on separate wafers and then stacked together using wafer-to-wafer hybrid bonding, is expected to commence with the introduction of 4F2 cells by 2027.”

Hybrid bonding will also be essential to advance HBM technology to enhance memory bandwidth and power efficiency and reduce stack thickness. The implementation of hybrid bonding is anticipated to start with the HBM4 generation around 2026, featuring up to 16 DRAM dies per stack and doubling the interface width to 2,048 bits.

While monolithic 3D DRAM is a promising long-term scaling solution, many aspects of its development remain uncertain, and the optimal strategy has yet to be defined. DRAM companies are exploring various approaches, including 1T-1C cells with horizontal capacitors and capacitor-less options like gain cells (2T0C) or 1T-DRAM based on the floating-body effect. The transition from 2D to 3D DRAM is expected to bring significant transformation to the DRAM industry, akin to the evolution seen with 3D NAND technology. Current models suggest that 3D DRAM could enter the market around 2030, reaching approximately ten million wafers per year by 2035, accounting for 38% of the projected DRAM wafer production.