Xilinx announced its Virtex-7 HT FPGAs with demonstrated 28Gbps serial transceiver performance required for next generation 100-400Gbps applications. The 28nm FPGAs enable communication equipment vendors to develop the integrated, high-bandwidth-efficient systems necessary to keep pace with the exploding global demand for more bandwidth in the wired infrastructure and datacenters. The new devices are equipped with the industry's highest-speed an...

Xilinx announced the immediate availability of Virtex(R)-6 HXT FPGAs that support 40Gbps and 100Gbps line cards with flexible port configurations including 1x40Gbps, 4x10Gbps, 1x100Gbps and 10x10Gbps. Additionally, Virtex-6 HXT FPGAs support the long reach optical requirements of next generation communications equipment without the need for costly external re-timer circuitry through market leading transceiver jitter performance.

Xilinx and ST-Ericsson, a world leader in wireless platforms and semiconductors, today announced that ST-Ericsson is developing a next-generation PEPS-2 application-specific standard product (ASSP) prototyping platform based on Xilinx's high performance Virtex(R)-6 FPGAs.

Xilinx announced that it has been named 2010 Supplier of the Year by Cisco. This prestigious award recognizes Xilinx for demonstrating excellence in innovation and all operational areas. The distinction was awarded during Cisco's 19th Annual Supplier Appreciation Event, held on September 29, 2010, at the Santa Clara Convention Center. The event celebrated the commitment of Cisco's preferred suppliers to ongoing customer satisfaction and accelerat...

Xilinx and Coreworks announced at the IBC2010 conference the first availability of a range of new Dolby audio technology and other audio codec IP cores for compressing multichannel audio in Field Programmable Gate Arrays (FPGAs). Integrating these codecs into a single FPGA eliminates the need for Digital Signal Processor (DSP) farms related to high-density multichannel audio streaming applications, thereby lowering overall cost, power consumption...

Xilinx announced at the IBC2010 conference a new development platform for engineers working to meet the rapidly growing demand for 3D TV broadcast and other high definition video applications. The Xilinx(R) Spartan(R)-6 FPGA Broadcast Connectivity Kit and Broadcast Processing Engine IP core enable broadcast system designers to build full systems for driving the high-speed transmission and real-time processing of video in a full range of professi...

Xilinx showcased at the Intel Developer Forum the Intel(R) QuickPath Interconnect (Intel(R) QPI) technology for enabling the integration of Field-Programmable Gate Arrays (FPGA) in high performance computing applications. The demonstration shows how high-performance Virtex FPGAs can support the low latency and memory coherency benefits of Intel(R) QPI when paired with Intel(R) Xeon(R) processors in HPC systems.

Xilinx announced the release of ISE Design Suite 12.3, kicking-off the FPGA leader's roll-out of Intellectual Property (IP) cores that meet the AMBA(R) 4 AXI4(TM) specification for interconnecting functional blocks in System-on-Chip (SoC) design, as well as introducing productivity enhancements to the PlanAhead(TM) Design and Analysis cockpit, and Intelligent Clock Gating support for reducing dynamic power consumption in Spartan(R)-6 FPGA designs...

This white paper describes the various threats to design security and the solutions offered by modern FPGAs.

Xilinx, Inc. (Nasdaq: XLNX) today announced at the IBC2010 conference a new development platform for engineers working to meet the rapidly growing demand for 3D TV broadcast and other high definition video applications. The Xilinx(R) Spartan(R)-6 FPGA Broadcast Connectivity Kit and Broadcast Processing Engine IP core enable broadcast system designers to build full systems for driving the high-speed transmission and real-time processing of video i...

Xilinx, Inc., (Nasdaq: XLNX) and Coreworks today announced at the IBC2010 conference the first availability of a range of new Dolby audio technology and other audio codec IP cores for compressing multichannel audio in Field Programmable Gate Arrays (FPGAs). Integrating these codecs into a single FPGA eliminates the need for Digital Signal Processor (DSP) farms related to high-density multichannel audio streaming applications, thereby lowering ove...

Xilinx and Vanguard Software Solutions, Inc. (VSofts) today demonstrated at the IBC2010 conference the ability of VSofts' H.264/AVC-I IP core to deliver a very low latency, ITU (International Telecommunication Union) and Panasonic AVC-Intra compliant Field Programmable Gate Array (FPGA) implementation of the industry-standard codec for providing minimal delay from source to encoded video in real-time video broadcast applications.

Xilinx announced that the latest version of its high-performance programmable solution for high assurance applications in the aerospace and defense (A&D) industries has been approved for use in Type 1 Crypto Systems by the National Security Agency (NSA). The approval of the Virtex®-5Q device and related physical security IP core, which together help form the Xilinx® Targeted Design Platform for secure communications, extends an on-going relati...

Xilinx introduces the first automated, fine-grain clock-gating solution that can reduce dynamic power by up to 30 percent for Virtex®-6 and Spartan®-6 FPGA designs

This white paper addresses the flexible partial reconfiguration options when designing with Virtex®-6, Virtex-5, and Virtex-4 FPGAs.

Xilinx today announced its participation at National Instruments NIWeek 2010, Aug. 3-5 at the Austin, Texas Convention Center. The event is one of the leading conferences and exhibitions on graphical system design.

Xilinx announced the availability of its fourth generation partial reconfiguration design flow and new improvements to its intelligent clock gating technology that deliver a 24 percent reduction in dynamic block-RAM (BRAM) power consumption in Virtex(R)-6 FPGA designs. Designers can download ISE(R) Design Suite 12.2 today to take advantage of an easier-to-use, intuitive partial reconfiguration design flow as well as take further steps to reduce p...

Xilinx announced the industry's first FPGA series that slashes total power consumption by 50 percent and offers industry-leading capacity of up to 2 million logic cells on the only unified architecture that scales across low-cost to ultra high-end families. Xilinx 7 series FPGAs further extend the range of applications programmable logic can address by breaking new ground in solving customer challenges for lower power and cost without compromisin...

Xilinx announced today that its FPGAs would be the first in the industry to support the MECHATROLINK-III specification, an open motion field network communications standard established by the Iruma, Saitama Prefecture, Japan-based MECHATROLINK Members Association. Xilinx Alliance Program member Tokyo Electron Device Limited has developed an IP core compatible with the MECHATROLINK-III standard for implementation with the low-cost Spartan(R)-6 FPG...

Xilinx announced today its support for the emerging V-by-One HS video interface standard with a solution from Xilinx Alliance Member Tokyo Electron Device that combines the low-cost Spartan(R)-6 FPGA family and a standards-compliant IP core. The solution builds on Xilinx's Targeted Design Platform strategy of offering integrated application-oriented solutions to enable the rapid development of consumer video products that are compliant with the n...