14nm-based FPGA test chips successfully demonstrated

“Today’s news marks a significant milestone for Altera and for our customers,” said Brad Howe, senior vice president of research and development at Altera. “Testing vital elements of our FPGAs in 14 nm Tri-Gate silicon allows us to validate device performance early in the design process and significantly accelerate the availability of our 14 nm-based products.”

Altera leverages a comprehensive test chip program to de-risk the rollout of all its next-generation products by validating how Altera IP performs using innovative process improvements and circuit design techniques prior to final product tape out. Through the use of multiple 14-nm devices, Altera continues to see very positive results in the high-speed transceiver circuitry, digital logic and hard-IP blocks that will be used in Stratix 10 FPGAs and SoCs.

Intel offers a true die shrink with its second-generation 14 nm Tri-Gate process, relative to alternative FinFET technologies. As a result, Altera will deliver unmatched performance, power, density and cost advantages with its next-generation FPGAs and SoCs.

“Altera and Intel have accomplished many significant milestones since we announced our foundry relationship in 2013 and today’s announcement is yet another defining moment in our partnership with Altera,” said Sunit Rikhi, vice president and general manager, Intel Custom Foundry. “Successfully demonstrating the functionality of Altera’s FPGA technology using our 14 nm Tri-Gate process is a testament to the outstanding work Altera’s team has done with our foundry team.”

Leveraging Intel’s 14 nm Tri-Gate process and an enhanced high-performance core fabric architecture, Stratix 10 FPGAs and SoCs are designed to enable the most advanced, highest performance applications in the communications, military, broadcast and compute and storage markets, while slashing system power. Stratix 10 FPGAs and SoCs deliver 2X the core performance of current high-end FPGAs with industry’s first Gigahertz-class FPGA featuring core operating performance up to 1 GHz. For high-performance systems that have the most strict power budgets, Stratix 10 devices allow customers to achieve up to a 70 percent reduction in power consumption. Stratix 10 FPGAs and SoCs also provide the industry’s highest levels of system integration, which include:

• The highest density monolithic device with greater than four million logic elements (LEs)
• Over 10 TeraFLOPs of single-precision, hardened floating point DSP performance
• More than 4X serial transceiver bandwidth compared to previous generation FPGAs, including 28-Gbps backplane capable transceivers and a path to 56 Gbps transceivers
• A 3rd-generation high-performance, quad-core 64-bit ARM Cortex-A53 processor system
• Multi-die solutions capable of integrating DRAM, SRAM, ASICs, processors and analog components in a single package.