Cadence recognised with four TSMC Partner of the Year Awards

The awards for the joint delivery of the 7nm mobile design platform and the 7nm HPC design platform were given based on the early, in-depth collaboration between TSMC and Cadence on FinFET enablement and the development of this latest advanced-node technology for next-gen SoC designs.

Cadence secured the award for the delivery of a comprehensive solution for InFO based technologies by integrating IC back-end design with advanced packaging solutions for wafer-level fan-out design, analysis and verification.

Finally, the analog/mixed-signal IP award was given based on customer feedback, portfolio breadth, strong technical support capabilities and customer adoption/production volume.

“Cadence continues to partner with TSMC to deliver the innovation and deep technical expertise that is required to address evolving challenges with the latest process nodes such as 7nm and advances in packaging technology such as InFO,” said Dr. Anirudh Devgan, senior vice president and general manager of the the Digital Design & Signoff Group and the System & Verification Group and at Cadence. “These awards from TSMC highlight Cadence’s ability to offer top-of-the-line tools and IP that our customers need for advanced SoC designs.”

“Throughout the history of our long collaborative relationship with Cadence, they have consistently delivered quality results and continue to invest in the latest technologies and most advanced nodes as demonstrated by its latest 7nm mobile design platform, 7nm HPC design platform, InFO design solution and analog/mixed-signal IP,” said Suk Lee, senior director of the Design Infrastructure Marketing Division at TSMC.

“We are pleased to present these awards to Cadence and look forward to continuing to partner together on more innovative solutions that our mutual customers demand in the years to come.”