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Arm discusses AI hardware at COMPUTEX

10th June 2024
Caitlin Gittins
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In his speech, "Building Sustainable, AI-Ready Cloud Data Centers with Arm Neoverse," Eddie Ramirez, Vice President of Marketing, Infrastructure Line of Business at Arm, highlighted the exponential growth of AI workloads across various industries and its impact on energy consumption.

Traditional AI hardware is often costly and power-intensive, prompting Arm to develop new silicon innovations to improve performance and power efficiency. Working with hyperscalers and tech giants like NVIDIA, AWS, Microsoft, and Google, Arm aims to design workload-optimized silicon to meet the increasing demand for efficient AI hardware.

Ramirez emphasised the importance of CPUs and GPUs for AI workloads, noting the necessity for both to effectively scale AI compute performance. Arm is focused on enhancing CPU performance for AI inferencing workloads, as demonstrated by the performance and power efficiency improvements of Arm Neoverse over competitors in the market.

Quantisation emerged as a technique to improve AI model efficiency by reducing the number of bits needed to represent data. Arm is developing new quantisation techniques to enhance AI model efficiency without compromising accuracy, enabling the implementation of AI Chatbot Servers across edge and cloud platforms.

Arm Neoverse CSS was highlighted as a solution for quickly transforming AI data centers with proven, validated, performance silicon, enabling partners to focus on system-level differentiation. Chiplets were also discussed as modular pieces of silicon that can improve yields and reduce costs, with Arm committed to advancing chiplet technology and fostering a diverse chiplet ecosystem.

Updates from Arm Total Design Partners revealed the program's growth to 25 members within six months, with engagement across various strategic geographies and foundries. Arm's unique support for Hardware-Software Co-Design enables partners to influence architecture development and receive support throughout the SOC development lifecycle, facilitating deep TCO optimisations and custom compute solutions beyond just the CPU.

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