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Advantest readies test solutions for SEMICON Japan

12th December 2023
Mick Elliott
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Advantest will feature its latest test solutions at SEMICON Japan 2023 at the Tokyo Big Sight (December 13-15).

Advantest, a Gold sponsor of the event, will showcase its broad range of test technologies enabling the evolution of increasingly complex semiconductors. This year’s live equipment demo in Advantest’s booth will include:

AI/HPC

  • NEW: Pin Scale Multilevel Serial that is both the first native and fully integrated HSIO instrument expanding the V93000 EXA Scale platform to address signaling requirements for advanced communication interfaces.
  • NEW: HA1200, offering die test capability with active thermal control to enable at-speed 100% test coverage before the dies are assembled into 2.5D/3D packages.
  • NEW: 2kW active thermal solution for M487x package handler series, offering thermal control capabilities to enable 100% test coverage for high computing ICs at final test.

Automotive

  • CREA’s power semiconductor test equipment for a wide variety of power devices, including SiC and GaN power testing on wafer, single-die, substrate, PKG, and module, typically used in industrial and automotive applications.
  • T2000 SoC test systems with Rapid Development Kit (RDK) for all SoCs, including automotive and power analog, and IP Engine 4 test solutions for fastest image processing to reduce CIS testing time and costs.
  • T6391 test system with LCD HP multi-channel digitizer module that addresses high-accuracy and high-voltage measurement demands for testing emerging display driver ICs.

IoT/5G

  • V93000 Wave Scale millimeter OTA enables far-field/near-field parametric OTA testing for millimeter wave applications (5GNR2, WiGiG, Car Radar). The solution covers multi-site testing for mass production and could be easily integrated into existing test infrastructure.
  • Wave Scale RF designed for cost-efficient production of 5G and Wi-Fi communication ICs, including WiFi 7 and WiFi 6E devices.
  • Expert-level remote support solutions using XR technologies and the future of maintenance using robots.

Advantest will also feature the following products via digital display:

  • NEW: T5851-STM32G, the new system-level test module that is capable of testing and covering the latest generation of embedded protocol NAND devices with UFS/PCIe interface up to 32 Gbps.
  • NEW: T5230 memory test system adopts a combined array architecture to reduce test cost for NAND/NVM wafer test, including wafer-level burn-in (WLBI).
  • MPT3000 solid state drive (SSD) test systems addressing test requirements associated with PCI Express fifth generation (PCIe Gen 5), Compute Express Link (CXL) and NVMe SSDs.
  • inteXcell, the first-ever fully integrated and unified test infrastructure to combine the T5835 tester into minimal-footprint test cells, ideal for advanced memory IC final testing. It contributes to increased production and energy efficiency for testing.
  • ACS Real-Time Data Infrastructure (ACS RTDI), an open solutions ecosystem enabling streaming data access and real-time analytics with integrated test software and hardware monitoring and control to improve semiconductor device yield, quality, and capacity.
  • ATS 7038 System Level Test (SLT) platform is a fully automated, massively parallel, high-volume manufacturing integrated test cell that addresses the emerging complexity and cost challenges driven by pressures to lower overall cost of test and improve yield. The 7038 supports both mission-mode testing and structural test coverage (SCAN, MBIST, LBIST etc.) over functional HSIO interface with appropriately DFT-enabled devices.

In addition to product displays, President and CEO Yoshiaki Yoshida will further discuss the company’s mission statement during his presentation, “Advantest Enabling the Future Through Semiconductor Testing,” on Dec. 15 at 2:10-2:35 p.m. at the SuperTHEATER in East Hall 2.

Advantest’s Shinji Fujita, senior director and test strategist, SVC marketing & business development, will be presenting “Challenges in Testing Advanced Large-Scale SoC Devices” at 1-1:30 p.m. during the STS Testing Session on Dec. 13 located at PremiumCLASS A in East Hall 8.

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