Verification technology simplifies electronic schematics

The complexity of modern electronics design has resulted in an increasing set of rules and verifications that need to be manually checked for schematic design errors. However, with VERA’s integration in Altium Designer, designers can now automatically inspect their schematics against a pre-defined checklist that utilises an intelligent component library that automatically checks for thousands of error violations in schematic designs. This enables a more efficient design process and therefore speeds time-to-market. 

The Altium Designer, with integrated ValydateVERA, will be available within Q1 2015. Altium and Valydate will be demonstrating the technology at DesignCon 2015. At the event, which takes place from 27^th to 29^th January in Santa Clara, CA, the companies will be located at booth 1034.

“This is yet another exciting extension that expands the current electronics design environment in Altium Designer,” said Daniel Fernsebner, Director of Technical Partnerships, Altium. “Our partnership with Valydate is moving the design process forward with a new set of validation tools that will save designers countless hours and money in schematic inspection checks and streamline the entire design process for improved time-to-market.”

“We’ve seen a steadily increasing number of customers working with complex designs who had no choice but to manually check their schematics for thousands of potential errors which adds up to countless wasted hours," said Jason Hingston, CTO, Altium. “This partnership with Valydate has extended the efficiency of schematic design in Altium Designer and paves a path to greater customer satisfaction and design reliability for all electronics designers.”