Design
Tanner licenses Tiburon compiler to add Verilog-A support to T-Spice Pro simulator
Tanner EDA is to add Tiburon Design Automation’s Verilog-A module to its T-Spice simulation tool for analogue design, creating a new package that will be called HiPer Simulation. The Verilog-A module, which is fully compatible with the Verilog-AMS Language Reference Manual Version 2.2, enables designers to develop analogue models for components or complete circuits blocks over 10 times faster than creating C-based models.
CircT-Spice Pro operates under Microsoft Windows. It generates fast and accurate simulations of analogue and mixed-signal IC designs. The tool can read HSPICE® and P-Spice® netlist formats directly and includes a Simulation Manager and device modelling functions. T-Spice Pro already offers support for Penn State Philips Model (PSP), BSIM3.3, BSIM4.5, BSIM SOI, EKV, MOS11, MOS20, VBIC and MEXTRAM. Custom models can be created using algebraic expressions for voltage and current controlled sources, data from external tables, or the C programming language. The addition of Verilog-A support makes the simulator significantly more versatile and productive.
HiPer Simulation will be available in Q1, 2008 priced at $11,500. Verilog-A support will be bundled with Tanner’s complete design flow package, HiPer Silicon, at no additional cost.
A beta version of HiPer Simulation is being trialled with some of Tanner’s existing customers from December 1, 2007.