STMicroelectronics Delivers Free TCP/IP Stack for STR91x Designers

NicheLite, from InterNiche Technologies, Inc., accelerates development of applications requiring Ethernet connectivity. ST and InterNiche, a specialist provider of embedded Internet Protocol software stacks, have tailored the standard stack for optimal performance with the STR91x. The stack capabilities can also be easily extended with add-on modules already available from InterNiche.



As a fully-featured TCP/IP stack with a memory footprint of less than 12 Kbytes, NicheLite delivers memory efficiency, low cost and power savings in embedded systems. Features include a compact TCP layer optimized for simple memory management, data copy prevention, low memory usage and high data throughput. The NicheLite IP layer supports one hardware interface and is compatible with Internet, email and network-management protocols also available from InterNiche. These include NicheStack PPP, FTP, Telnet Server, HTTP Server, DHCP Server, Email, and SNMP. Other valuable protocols supported include Address Resolution Protocol (ARP), Internet Control Message Protocol (ICMP), User Datagram Protocol (UDP) and Client Bootstrap Protocol (BOOTP).



Customers developing applications for the STR91x family can implement NicheLite at no charge, with the option to purchase support from InterNiche as required. Included with the stack is the NicheTool debugging and tuning software suite, which provides powerful porting and optimization capabilities.



Cost-effective access to NicheLite complements the architecture and peripherals of ST’s STR91x family, which is optimized for high performance in embedded networking applications. Building on the inherently high throughput of the ARM966E-S core, ST has added high-speed burst Flash memory and zero-latency SRAM for efficient instruction execution and data movement. This allows the STR91x family to achieve 96 MIPS peak code execution at 96MHz. In addition, up to nine fully featured Direct Memory Access (DMA) channels minimize loading on the CPU during data transfers. The on-chip Ethernet DMA controller, for example, allows raw Ethernet frames to be transferred into SRAM at 91 Mbps while imposing only 10% CPU loading. Other advantages for networking applications requiring real-time performance include dynamic power-scaling capabilities, as well as a wide variety of on-chip peripherals and interfaces. These include a USB Full Speed interface, CAN interface, three UART/IrDA interfaces, two SPI ports, two I2C ports, an eight-channel 10-bit ADC, four 16-bit timers and a 3-phase AC motor control unit.