SoC verification solution for Arm-based servers

The Xcelium simulation runs natively on Arm-based servers delivering significant power and capacity benefits, executing both high-throughput and long-latency workloads to reduce overall SoC verification time and costs.

The Xcelium simulator, part of the Cadence Verification Suite, improves runtime through optimised single-core simulation and innovative multi-core simulation. It provides up to two times speedup for single-core, and three to ten times speedup for multi-core simulation tasks compared to previous simulators, reducing long-latency SoC tests and shortening overall time to market. Running the Xcelium simulator on Arm-based servers allows systems and semiconductor companies to best utilise the available cores within those servers to achieve the fast verification that advanced-node designs require. Additionally, the simulator provides automatic partitioning of design and verification testbench codes for fast execution on multi-core servers.

Arm-based servers deliver the high-core density needed to enable accelerated simulation, allowing designers to complete their verification faster. When running single-core workloads, Arm-based servers are able to execute more Xcelium jobs within the same data centre footprint. When running long-latency workloads, they are able to provide more cores for the parallel simulation. Together, the Xcelium simulator running on Arm-based servers maintain the throughput required to develop leading-edge SoCs and also reduce the total cost of ownership for the data centre.

“Collaborating with Cadence on the Xcelium simulator is a key milestone in accelerating the electronic design ecosystem for Arm-based servers,” said Drew Henry, Senior Vice President and General Manager, Infrastructure Business Unit, Arm. “The flexibility of the Arm architecture will create new opportunities for more compute core density for EDA workloads, enabling high-performance parallel simulation while reducing the power and floor space required for implementing and validating silicon designs.”

“The rapidly-increasing requirements for the verification of mobile, server, IoT, automotive, and other applications are leading our customers to seek high-performance servers,” said Dr. Anirudh Devgan, Executive Vice President and General Manager of the Digital & Signoff Group and the System & Verification Group at Cadence. "The Xcelium logic simulation technology is very well suited for Arm-based servers, helping engineers to shorten SoC verification schedules."