Design
Silicon Frontline - Post-Layout Verification Products Stand Out for Semiconductor Power Device, Nanometer and A/MS Design
Silicon Frontline Technology announced today that since the May introduction of the company and its first products, F3D (Fast 3D) for fast 3D extraction and R3D (Resistive 3D) for 3D extraction and analysis of large resistive structures, the company has achieved success and validated its position as a player in the post-layout verification and 3D extraction markets.
F3D In July, two of the world’s leading foundries, UMC and TSMC, validated the F3D product for nanometer design technologies. At the Design Automation Conference (DAC), the company was honored with a listing in GarySmithEDA’s What To See @ DAC 2009 list, and in SCDsource’s ten hot technologies to see at DAC 2009. To date, Silicon Frontline customers are among the top 10 semiconductor companies.
“As we move toward 32nm technology, electronic designers need accurate design solutions that help them get to market quicker with high quality products,” remarked Gary Smith, principal EDA analyst, GarySmithEDA. “The companies on our What To See @ DAC 2009 list represent EDA companies that offer new products in critical areas, like post-layout 3D extraction in the case of Silicon Frontline.”
“We have been fortunate to achieve so much since our introduction,” said Yuri Feinberg, CEO, Silicon Frontline. “Our customers and prospects continue to help us hone our products and are working with us to create new products that will improve their productivity and design quality.”