Mathworks - Simulink Design Verifier 2.0 - Offers New Capabilities for Automatic Error Detection in Simulink Models

Engineers across the aerospace, automotive, medical, and industrial automation and machinery industries can now apply Model-Based Design with formal analysis methods provided by Simulink Design Verifier 2.0 to identify design errors in Simulink and Stateflow models without extensive testing or simulation.



Key product features include:

Detection of dead logic, integer and fixed-point overflows, division by zero, and assertion violation

Blocks and functions for modeling functional and safety requirements

Test vector generation from functional requirements and model coverage objectives

Property proving, with generation of violation examples for analysis and debugging

Fixed-point and floating-point model support