Full-featured Value Boundary-scan Developers Suite

5th October 2010

ES Admin

0 0

JTAG Technologies is delighted to announce a new economically-priced software and hardware system for board-level and system designers looking to benefit from a boundary-scan test and programming strategy. Boundary-scan, or JTAG, testing has remained a powerful tool for identifying assembly faults such as open- and short-circuits, missing components and damaged devices since its introduction (as IEEE Std 1149.1) in 1990. However, while boundary-scan tools have been in use for almost 20 years, the relatively high cost of ‘professional’ systems has meant that they largely remain in the domain of test and production engineers. Until now.

JTAG Technologies’ ProVision Designer Station offers a low entry price yet retains key features such as automatic test program generation (ATPG) for interconnections and in-system programming (ISP) for devices.

ProVision Designer Station is ideal for the preparation of all boundary-scan test routines that might be used in the design environment and beyond. The tool incorporates a highly automated test program generator for interconnects that takes advantage of a library of thousands of non-boundary-scan (cluster) device models to create a safe [to execute], high-quality core test.

Rapid generation and execution of this so-called ‘Interconnect Test’ using the handy JT 3705/USB controller, that is included with the system, allows the user to gain quickly confidence that the core boundary-scan to boundary-scan pin connections of a design are defect-free.

ProVision Designer Station also includes a unique scripting library known as JFT (JTAG Functional Test) that harnesses the power of the open-source PythonTM language to add sophisticated test options for logic clusters and for the programming of memory devices. Furthermore, additional interactive tools, such as ActiveTest, enable rapid generation of simple cluster tests and checks that might require only a small number of test patterns.

A serial vector format (SVF) player feature serves as a programmer for CPLDs and FPGAs, and the system also includes the sequencer module ‘AEX Manager.’

In common with other members of the ProVision family ProVision Designer station requires that the user has only basic boundary-scan knowledge. Since all the manipulation of test patterns and serializing of data streams is undertaken by the software, the user can concentrate on the optimum way to debug his/her design from the board/device perspective.

Peter van den Eijnden, MD of JTAG Technologies, commented: “Encouraging the use of boundary-scan testing through the use of no-nonsense and economically-priced tools can only be good for the industry. We know from many years’ experience that these tools save money by reducing the time needed for functional testing and perhaps more importantly - from the designer’s perspective - speeding time-to-market. Allowing designers to take ownership of the test ‘problem’ is an ideal way to prepare for new product introduction.”