Imec demonstrates extremely high-speed heterojunction bipolar transistors

The extremely high-speed devices have a fully self-aligned architecture by self-alignment of the emitter, base and collector region, and implement an optimized collector doping profile. Compared to III-V HBT devices, SiGe:C HBTs combine high-density and low-cost integration, making them suitable for consumer applications. Such high-speed devices can open up new application areas, working at very high frequencies with lower power dissipation, or applications which require a reduced impact of process, voltage and temperature variations at lower frequencies for better circuit reliability.

To achieve the ultra high-speed requirements, state-of-the-art SiGe:C HBTs need further up-scaling of the device performance. Thin sub-collector doping profiles are generally believed to be mandatory for this up-scaling. Usually, the collector dopants are introduced in the beginning of the processing and thus exposed to the complete thermal budget of the process flow. This complicates the accurate positioning of the buried collector. By in-situ arsenic doping during the simultaneous growth of the sub-collector pedestal and the SiGe:C base, imec introduced both a thin, well controlled, lowly doped collector region close to the base and a sharp transition to the highly doped collector without further complicating the process. This resulted in a considerable increase of the overall HBT device performance: Peak fMAX values above 450GHz are obtained on devices with a high early voltage, a BVCEO of 1.7V and a sharp transition from the saturation to the active region in the IC-VCE output curve. Despite the aggressive scaling of the sub-collector doping profile, the collector-base capacitance values did not increase much. Moreover, the current gain is well defined, with an average around 400 and the emitter-base tunnel current, visible at low VBE values, is limited as well.

The devices open new avenues in wireless communications and imaging