IDE supports RISC-V Open ISAs

SoftConsole is Microsemi’s free software development environment enabling rapid production of C and C++ programming language designs for its field programmable gate arrays (FPGAs).

“With the majority of Microsemi FPGA designers utilising a Windows platform for their development efforts, SoftConsole v5.1 not only supports our RISC-V soft CPU cores to enable designs with our highly secure and reliable FPGAs, but it can also be used for any RV32I standard ISA extensions,” said Tim Morin, Director of Marketing at Microsemi. “This product release broadens the RISC-V ecosystem for those developing on Windows machines, and leverages our leadership position as we continue investing in this architecture to provide customers dependable, long term roadmap support.”

Microsemi’s SoftConsole v5.1, a GNU compiler collection (GCC), now supports both Windows and Linux for RISC-V designs and can be used for RV32I implementations including extensions to the baseline RV32I architecture such as M,A,F,D,G and C. Offering low power and an open architecture, it supports Microsemi’s PolarFire, RTG4, SmartFusion2 and IGLOO2 FPGA-based RISC-V soft CPUs as well as the HiFive1 Arduino kit from SiFive, a fabless semiconductor company that produces computer chips based on the RISC-V ISA. SoftConsole v5.1 is well suited for developing a variety of applications within the aerospace and defence, communications, data centre and industrial markets.

RISC-V, an ISA which is now a standard open architecture under the governance of the RISC-V Foundation, offers numerous benefits, including enabling the open source community to test and improve cores at a faster pace than closed ISAs. As the RISC-V intellectual property (IP) core is not encrypted, it can be used to ensure trust and certifications not possible with closed architectures. Portability is another benefit of the technology. For example, designers can begin development with Microsemi’s RISC-V core in its FPGAs and then move to an application specific integrated circuit (ASIC) royalty-free.

“Rumble Development is excited Microsemi is investing in RISC-V with its IP core and the new version of the SoftConsole IDE,” said Michael Aronson, President of Rumble Development, a customer of Microsemi which provides custom logic solutions to original equipment manufacturers (OEMs). “We believe the portability, stability and openness of this ISA combined with Microsemi’s ecosystem will enable us to innovate faster and deliver best-in-class solutions.”

As a free software development environment supporting quick development of C and C++ executables for Microsemi’s FPGAs using RISC-V soft CPU cores, SoftConsole v5.1 provides a flexible graphical interface for managing embedded software development projects. Customers can quickly develop and debug software programs and implement them in Microsemi FPGAs, with a fully integrated debugger offering easy access to memory contents, registers and single-step execution.

SoftConsole also enables users to configure project settings and organise files, provides simultaneous access to multiple tool windows, and delivers the ability to quickly switch editing and debug views.

The RISC-V ISA was named Best Technology of 2016 by The Linley Group at its annual Analysts’ Choice Awards in January 2017, where its principal analyst Linley Gwennap expressed support of the emerging technology.

“RISC-V is a modern take on the classic RISC instruction set, providing a clean and extensible approach suitable for a broad range of microprocessor implementations. More significantly, the open source, royalty-free RISC-V instruction set creates a new business model for CPU designers,” said Gwennap. “This combination has generated sizable industry interest in RISC-V, which will lead to several commercial deployments this year and beyond.”

Commenting on the benefits of SoftConsole for RISC-V, Microsemi’s Director of SOC/FPGA Product Marketing & Business Development, Ted Marena commented: In terms of the real benefits to the design community and software and firmware engineers, we’re now offering both a Windows and Linux-based IDE for 32-bit as well as 64-bit RISC-V cores (there are no 64-bit cores currently out on the market but some are expected). We don’t just want people to use SoftConsole for our RISC-V cores, we just want them to be utilised and we believe that this is a great platform that customers can leverage.

“We’re really taking a leadership role by driving the adoption and the awareness for the technology. The benefits to us is that the open source community has a very innovative and detailed way of making enhancements and finding bugs etc, and the pace of update and innovation is very fast. So that benefits us and others that use our tools.

“Another benefit of our technology is that, because we have Flash-based FPGAs, every one of our devices has a block of Flash that users can access to store the boot code. So we can very securely boot these RISC-V cores. Also, we have a piece of software that is part of SoftConsole that is called the Firmware Catalogue and we’re putting a bunch drivers and example designs to make it easy, not just for the FPGA guys, but were also going to have programming bit streams, so if a software engineer wants to do C coding for a core they can just program a board without having to touch the HDL, and they can get started using SoftConsole.”