Design

Developing measures for fault avoidance

6th July 2018
Alex Lynn
0

It has been announced by Cadence Design Systems, that Hitachi has used the Cadence JasperGold Formal Verification Platform to developνCOSS S-zero, an industrial facilities functional safety controller that has been certified for Safety Integrity Level (SIL) 3 in accordance with the International Electrotechnical Commission (IEC) 61508 Series functional safety standard.

Through use of the Cadence technologies, Hitachi successfully developed measures for fault avoidance to comply with IEC 61508 Series SIL 4 requirements, ensuring that its functional safety controller operates correctly in response to its inputs and maintains safety.

Hitachi used the JasperGold platform to easily adopt formal methods and perform the multiple hardware verification tasks needed to deliver a robust, fail-safe mechanism that meets IEC 61508 safety requirements. Use of the Cadence technologies helped Hitachi verify hardware calculation elements that were developed internally for system-specific controls.

The JasperGold platform’s ProofCore technology, which analyses the Design Under Test (DUT), helped Hitachi improve its verification environment to ensure that the functional safety controller operates correctly in response to its inputs while maintaining safety. Hitachi also incorporated Cadence simulation and emulation solutions with the JasperGold platform to achieve 100% verification of the safety requirements.

Masahiro Shiraishi, Group Leader Engineer of Control System Platform Division, Omika Works at Hitachi, stated: “Functional safety compliance is critical for industrial facilities systems and our customers. When compared with our previous verification methodology that was based on dynamic simulation, our new formal methodology based on the Cadence JasperGold platform allowed us to identify corner case bugs much earlier. Our close collaboration with Cadence lets our customers confidently adopt our industrial facilities functional safety controller knowing that it meets IEC 61508 compliance requirements.”

The JasperGold Formal Verification Platform is part of the Cadence Verification Suite. It supports the company’s System Design Enablement strategy, which enables system and semiconductor companies to create complete, differentiated end products more efficiently.

The Cadence Verification Suite is comprised of the best-in-class JasperGold, Xcelium, Palladium Z1 and Protium S1 core engines, verification fabric technologies and solutions that increase design quality and throughput, fulfilling verification requirements for a wide variety of applications and vertical segments.

Featured products

Upcoming Events

View all events
Newsletter
Latest global electronics news
© Copyright 2024 Electronic Specifier