Design

Design Guide revised by PICMG subcommittee

4th February 2014
Staff Reporter
0

Available for download without charge, Revision 2 of PICMG’s COM Express Carrier Design Guide has been announced. PICMG Executive Member, ADLINK, reports that the Design Guide was updated by a special PICMG subcommittee to reflect the new signals adopted with the PICMG COM.0 R2.1 specification.

The revisions includes design rules and guidance for high-speed interfaces, including PCI Express Gen3, SuperSpeed USB, SATA 6Gb/s, and reference schematics for DDI to support HMDI, DVI and DisplayPort outputs. The reference schematics detail the external circuitry required to implement the various COM Express peripheral functions and explains how to extend the supported buses, as well as how to add peripherals and expansion slots to a COM Express-based system. Further to this, the Guide provides information for designing a custom system carrier board for COM Express modules.

“Significant time and effort was spent on simulation of the newly adopted high-speed signals to ensure design rules that result in working carrier boards,” explained ADLINK’s CTO, Jeff Munch, who chaired the special PICMG subcommittee, keeping the process moving forward through final release of the latest document.

“On-going updates are critical to enable full-featured designs using any open specification, particularly one as accepted in the embedded vendor community as COM Express,” said Joe Pavlat, president and chairman of the PICMG consortium. “We greatly appreciate the active participation of members like ADLINK to lead these efforts.”

The Design Guide is available on both the PICMG and ADLINK websites.

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