CST MWS reduces multi-level package design times

eASIC is a fabless semiconductor company specializing in Single Mask Adaptable ASIC (application-specific integrated circuits). They produce custom integrated circuits for a wide range of applications, designed with the specific needs of the customers in mind. Supporting customers effectively, especially during the development stage of a new product, requires a rapid, cost-effective design and manufacturing process.

When designing a chip for a high-speed application, it’s not only the behavior of the IC itself that counts. The whole channel, including the package and the printed circuit board, affects the performance. By taking the PCB layout into account during the design stage, eASIC can improve the performance of the device and reduce the risk of problems emerging once installed.

Electromagnetic simulation can allow the engineer to investigate the characteristics of a design before committing to manufacturing. Because PCBs are both large and complex while packages are small and intricate, modeling the entire system in one go is computationally intensive, requires long simulation times and heavy memory consumption. For this reason, eASIC decided to split the simulation, and model the package and PCB separately.

For this, eASIC chose CST MICROWAVE STUDIO, a full-wave 3D simulation tool. CST MWS includes System Assembly and Modeling, which allows simulations to be linked and cascaded, so that the system can be considered as the sum of its parts. The existing combined package/PCB models were decomposed to separate the two parts, and were linked using ports with a reference plane at the interface.

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