ASSET InterTech White Paper exploring signal integrity problems on high-speed buses

To avoid potential problems on high-speed buses like DDR3, PCI Express, Intel QPI, Serial ATA, USB and others, bus performance must be validated during each phase of a system’s life cycle, including design/development, manufacturing and as an installed system in the field. Unfortunately, effectively and economically validating the signal integrity on a high-speed bus has become more difficult as the limitations of legacy probe-based test equipment such as oscilloscopes have become more obvious in recent years. Now though, non-intrusive software-driven test methods based on embedded instrumentation are providing alternative validation solutions that are more cost-effective and deliver observed signal integrity data.