SecureRF partners with Intel for future-proof FPGA security

The first security toolkit, available now, addresses Intel's DE10-Nano development board, a suitable platform for developers who require design flexibility, performance, and expanded I/O options, when creating innovative applications for the IoT.

To support fast and easy implementation, SecureRF is providing a complete SDK and has authored a technical article on authenticating remote devices with a Cyclone V System-on-Chip (SoC) FPGA that can now be found on the Intel Developer Zone website.

Intel FPGA-SoC devices are well suited for a wide variety of functions, including acting as an IoT gateway that can authenticate and control hundreds of remote endpoints. Low resource endpoints, often running on 8- or 16-bit processors, limit the options for strong security that must also run on an IoT gateway.

Legacy security methods such as ECC are computationally too expensive. SecureRF’s security toolkit includes Ironwood Key Agreement Protocol (Ironwood KAP) and Walnut Digital Signature Algorithm (WalnutDSA), which are designed to run on the smallest processors. Based on Group Theoretic Cryptography methods, SecureRF’s solutions are up to 60 times more efficient than ECC, consume up to 140 times less energy, and are quantum-resistant to all known attacks.

“Authentication and secure control of a device entering the IoT is not only a privacy issue, but it is quickly becoming a safety concern too. Many of these small processors are now controlling critical functions in cars, and other types of machines that interact with people every day, and our solutions are focused on creating a trusted environment,” noted Louis Parks, CEO of SecureRF.

Developers can download an SD card image of SecureRF’s security tools from its Security Toolkit webpage. The image includes WalnutDSA and Ironwood, as well as three separate demonstrations showing the operation of the signature algorithm and the key agreement protocol. Ironwood enables two endpoints to generate a shared secret over an open channel, while WalnutDSA allows one device to generate a document that can be verified by another device. Both methods are implemented partially in software on the Intel Cyclone V’s ARM Cortex-A9 and partially in the FPGA’s fabric. All the compute-intensive routines are executed in hardware, for better performance.

The DE10-Nano board offers a robust hardware design platform built around the Cyclone V FPGA, along with high speed DDR3 memory, a wide range of analogue-to-digital capabilities and Ethernet networking.

Delivering high levels of reconfigurability and flexibility for developers, the Cyclone V integrates a high performance ARM-based Hard Processor System (HPS), consisting of dual-core Cortex-A9 embedded processors, peripherals and memory interfaces, connected to programmable logic via a high bandwidth interconnect backbone.