KYZEN’s Daniel Gao to present at NEPCON China.

Based in Beijing, Gao has more than 10 years of experience in semiconductor applications and electronic assemblies including wafer bumping processes, flip Chip packaging, LED packaging and PCB assembly applications.

Gao will explain that the end-goal for circuit designers is to increase device functionality in smaller platforms. The standoff heights within the Z-axis of miniaturized components are approaching one mil. During reflow, flux residues can become entrapped under the bottom terminations. Mobile ions within the flux residues form leakage currents, especially when the device is operating within humid environments. Flux residue can contain ionic materials which, when trapped under a part, can lead to shorts across adjacent pads or voltage/current leakage pathways.

Companies who require devices to meet long-term reliability need an improved industry specification that allows for an accurate risk assessment. The problem is that the risk assessment is a multi-variable issue influenced by flux type, activation temperature, component type and placement; the type and criticality of the circuit in which the component is in, wash characteristics, solder paste volume, PCB cleanliness and component contamination. Current measures of “clean” do not indicate if the product is clean in a critical area.

Gao’s presentation will report ongoing research to study these multi-variant issues using a new test vehicle with sensors placed under and near bottom terminations. The test vehicles are designed to track impedance where it matters most. The goal of this research is to develop an improved method for studying multi-variables that may impact circuit reliability. Data findings, inferences from the data findings, and recommendations will be documented and presented.