Mentor has announced a partnership with Arm to help integrated circuit (IC) designers optimise and streamline the functional verification of their Arm-based designs. With this collaboration, the Arm Design Reviews program now offers the expertise of Mentor’s top functional verification engineers to help customers optimise their Arm-based System-on-Chip (SoC) designs.

Mentor has announced that Calibre nmPlatform and Analog FastSPICE (AFS) custom and analogue/mixed-signal (AMS) circuit verification platform are now qualified for Samsung Foundry’s newest process technologies. Customers can now use these offerings on Samsung’s 5/4-nanometer FinFET processes for the verification and sign-off of production tapeouts for their most advanced IC designs.

Mentor has announced significant advances in the Analog FastSPICE Platform with the introduction of Analog FastSPICE eXTreme technology for nanometer-scale verification of large, post-layout analog designs.

To help integrated circuit (IC) designers achieve design closure faster, Mentor, has announced the extension of their Calibre Recon technology to the Calibre nmLVS circuit verification platform.

Mentor, a Siemens business, has announced it has collaborated with Samsung Foundry to develop a new reference kit designed to help mutual customers substantially simplify and streamline the testing, diagnosis and repair of in-fab memory in advanced systems-on-chip (SoCs) during fabrication.

Mentor has announced that its Tessent Safety ecosystem helped artificial intelligence (AI) vision silicon company Ambarella successfully meet in-system test requirements and achieve ISO26262 automotive safety integrity level (ASIL) goals for its CV22FS and CV2FS automotive camera system-on-chips (SoCs).

Mentor, a Siemens business, has announced that multiple Mentor product lines are now certified for United Microelectronic Corporation’s (UMC’s) 22uLP (ultra Low Power) process technology, including Mentor’s Calibre platform, Analog FastSPICE platform, and Nitro-SoC digital design platform.

Mentor, a Siemens business, has announced that Mythic, an artificial intelligence (AI) processor company, has standardised on Mentor’s Analog FastSPICE Platform for AI processor design, custom circuit verification and device noise analysis. Additionally, Mythic has selected Mentor’s Symphony Mixed-Signal Platform to help verify the functionality of the integrated analog and digital logic in its Intelligence Processing Units (IPUs...

Siemens Digital Industries Software and ARM announced a partnership formed to help automotive manufacturers design their own silicon at the Consumer Electronics Show in Las Vegas. David Fritz, Global Automotive IC Technology Manager, Mentor asserts that it is inevitable that car makers will want to design custom silicon from the outset of a car’s design.

By 2022, more than two-thirds of new cars on US roads will have online connections to their safety-critical system, putting them at risk of deadly hacks (Consumer Watchdog report, July 2019) to vehicles’ ‘head’ systems, used primarily for infotainment, GPS navigation, and other features.

Mentor, a Siemens business, has announced that artificial intelligence (AI) solution provider Enflame Technology has recently used Mentor’s Tessent software product family to successfully meet silicon test requirements and achieve rapid test bring-up for its new Deep Thinking Unit (DTU) chip.

Mentor has announced that its Tanner analog/mixed-signal (AMS) design tools – the Tanner S-Edit schematic capture tool and the Tanner L-Edit layout editor – are now certified for TSMC’s interoperable PDKs (iPDKs) for a broad range of TSMC specialty process technologies for high-volume analog IC designs.

Mentor has introduced Tessent Connect – an innovative design-for-test (DFT) automation methodology that delivers intent-driven hierarchical test implementation that helps IC design teams achieve manufacturing test quality goals faster and with fewer resources compared to traditional DFT methods.

Mentor has introduced the Tessent software Safety ecosystem – a comprehensive portfolio of automotive IC test solutions with links to its industry-leading partners. The program helps IC design teams meet the increasingly stringent functional safety requirements of the global automotive industry.

There were two slides in Geir Eide’s PowerPoint presentation about Mentor Graphics newly introduced Tessent Connect design for test (DfT) platform that resembled a before and after advertisement. In the first slide IC design teams are using conventional design for test methodology which induces headaches as they try to retrofit flows to use hierarchical components and technologies.

  Tony Nicoli, Aerospace & Defence Director, Mentor’s Integrated Electrical Systems Division, speaks to Electronic Specifier about the company’s new automated design-for-compliance methodology that will impact the aerospace industry.

It has been announced by Mentor, a Siemens business, that several tools in its Calibre nmPlatform and Analog FastSPICE (AFS) Platform have been certified on TSMC’s 5nm FinFET process technology. Mentor also announced it has successfully completed reference flow materials in support of TSMC’s innovative System-on-Integrated-Chips (TSMC-SoIC) multi-chip 3D stacking technology.

Continuing to expand its functional verification footprint across high-growth markets and applications, Mentor, a Siemens business, has announced that Arm China has selected Mentor’s Questa Simulation with Power Aware verification solution to handle critical tasks in the development of next-generation, low-power microcontroller (MCU) cores.

It has been announced by Mentor, a Siemens business, that DAIKIN has selected Mentor’s Xpedition printed circuit board (PCB) design flow software as their global design environment. Although DAIKIN had an established PCB design process, the company needed to share CAD library and design data across its globally dispersed locations in order to increase design efficiency and quality.

It has been announced by Mentor, a Siemens business, that artificial intelligence (AI) semiconductor innovator Graphcore successfully met its silicon test requirements and achieved rapid test bring-up on its Colossus Intelligence Processing Unit (IPU) by using Mentor’s Tessent product family.