Saelig introduces fast SPI ethernet controller IC

The W5500's TCP/IP Core is composed of a fully-hardwired, market-proven 10BaseT/100BaseTX TCP/IP stack with an integrated Ethernet MAC & PHY which supports TCP, UDP, IPv4, ICMP,ARP, IGMP, and PPPoE protocols.

W5500 represents a 3^rd generation design, with improvements and smaller geometry manufacturing and die size. The W5500 die has also been laid out for easy integration with other chip dies such as MCU, DSP, and FPGA that use System-in-Package packaging techniques. The W5500 now offers a fast, versatile SPI interface (up to 80 MHz) and the ability for a host MCU to flexibly utilize the W5500's buffer RAM for general-purpose data, a plus when using low-cost MCUs with limited on-chip RAM. Product hardware design is also simplified by the reduction of external power supply components and the use of firmware-setting (rather than pin-setting) of physical layer PHY options.

The W5500 allows popular low-cost 8/16-bit MCUs to offer Ethernet capabilities - its hardware protocol processing and large RAM buffer facilitates small memory MCU applications. Ethernet capability can also be added to an existing design without the need to redesign with a more expensive MCU. Large and small MCUs alike can benefit from the W5500's 'Internet Offload' capabilities that minimize application software interference and timing constraints associated with network activity. Application and network performance remain stable and predictable under varying loads - never a "stack overflow"! Unlike designs that require software to handle basic network operations, the W5500 delivers a measure of 'firewall'-like protection and 'always on' reliability in hardware.

The W5500 is more power efficient (max internal temperature 45°C) than its predecessors and only offers an SPI control interface. It offers features such as Power-Down, Wake-On-LAN, Auto-Negotiation, etc. and is housed in the industry-standard LQFP package (48pin, 9x9mm², 0.5 mm pitch) for easy use and simple handling.

Advantages of the W5500 (TCP/IP + MAC + 10/100 PHY) over a simple MAC-PHY Ethernet controller include eight simultaneous TCP/IP protocol sockets and 32kByte of available dual-ported RAM. Offloading the TCP/IP stack to an external chip block is an excellent strategy for speeding up product development time and avoiding operating crashes and unreliability. It reduces CPU burden and improves overall system performance.

The performance and security advantages of hardware TCP/IP are well known to manufacturers of ATMs, set-top boxes, and industrial/smart meters. The W5500, with its guaranteed 5 year availability, is suitable for home network devices, set-top boxes, digital media adapters, serial-to-Ethernet devices, access controls, LED displays, wireless AP relays, POS printers, DVRs, network cameras, kiosks, building automation, etc.