IP core creates low-latency & cost-effective computing

The RapidIO 40Gb/s IP core is designed to serve as a basic building block and gateway between processing elements to create low-latency, scalable, energy-efficient computing. The lower latency and higher speed interface products will be essential for the efficient and cost-effective management and analysis of the massive volumes of data generated by today’s electronics.

The RapidIO 40Gb/s 10xN IP core will be used in upcoming RapidIO 40-100Gb/s switching, bridging, processor and memory controller products, including the switching collaboration between IDT and eSilicon to develop 100ns latency RapidIO switches operating at 40Gb/s per port. The solutions will be backward compatible with RapidIO products operating at 10-20Gb/s data rates.

“This initial 40Gb/s product provides an exciting interconnect path for the Open Compute Project, where we are innovating from the system level down to the silicon level,” said Cole Crawford, Executive Director of the Open Compute Project (OCP), whose mission is to design and enable the delivery of the most efficient server, storage and data center hardware designs for scalable computing. “IDT’s RapidIO 10xN solutions support the OCP’s goal for open, interoperable, vendor-agnostic solutions that take us from today’s custom vendor-based HPC solutions towards open exascale computing.”

“Through our work with Integrated Device Technology, Texas Instruments has been able to ship millions of ports of RapidIO Gen1 and Gen2,” said Paul Carson, Director within TI’s processor organisation and Chair of the RapidIO.org steering committee, “It is exciting to see that IDT is expanding the overall RapidIO ecosystem with a comprehensive IP core family starting with 40Gb/s today and scaling up to 100Gb/s. This will enable the RapidIO standards to further improve performance, reliability, and latency in wireless infrastructure, high-performance compute, mission-critical, and other multi-processor system applications.”

“Our HPC and analytics customers are facing the same latency, power and space constrains as our embedded customers, while trying to scale to large systems with thousands of nodes that stretch beyond petascale to exascale computing,” said Sean Fan, Vice President and General Manager, Interface and Connectivity Division, IDT. “The RapidIO 10xN IP core, along with upcoming switches and interface products, will deliver the latency reductions and throughput improvements needed for 4G advanced and 5G systems, offering a clear path to unprecedented scale and bandwidth with an open industry interconnect fabric.”