Vision and sensor fusion processor targets ADAS applications

The processor combines a robust, heterogeneous mix of CPU, GPU and image processors to deliver high-performance processing, vision acceleration, and security features.

It integrates four Arm Cortex-A53 cores running at up to 1GHz with a NEON coprocessor and an Arm Cortex-M4 CPU.

The Cortex-M4 allows automotive operating systems to interface with external devices separate from the Cortex-A53 CPU.

The processor offers 4MBytes of on-chip system RAM and two 32-bit DRAM controllers with support for LPDDR2/DDR3/DDR3L, all with ECC memory.

For image processing and vision capabilities, the device includes dual APEX-2 vision accelerators, a GC3000 3D GPU with surround-view support, MIPI CSI2 and parallel image sensor interfaces, and an embedded image signal processor.

It also offers an impressive array of connectivity features, including Gigabit Ethernet, Zipwire serial interface, dual CAN-FD interfaces, dual-channel FlexRay communication, and a PCI Express (PCIe) lane.

There are a wealth of security capabilities, including an on-the-fly AES decryption engine (OTFAD) and a Cryptographic Service Engine (CSE) that meets Secure Hardware Extension (SHE) protocol specifications.

The device also features automotive safety compliance capabilities developed through NXP’s SafeAssure program, which helps manufacturers achieve system compliance with ISO 26262 and IEC 61508 functional safety standards.

The processor is supported the SBC-S32V234 Vision Prototype Kit, which offers options for Linux (Yocto) and AutoSAR operating systems. The SBC-S32V234 kit is supported by a complete series of enablement tools and the S32 Design Studio integrated development environment (IDE).