IP solutions address requirements for ADAS

23rd September 2016

Daisy Stapley-Bunten

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Cadence Design Systems has announced a broad portfolio of Cadence interface and Denali memory IP solutions for automotive applications supporting TSMC’s 16nm FinFET Compact (16FFC) process. By offering a wide array of IP using TSMC’s 16FFC process, Cadence is enabling automotive customers to accelerate time to market while gaining the benefits of TSMC’s most advanced process technology used in automotive applications.

These newly announced automotive IP solutions are designed for high reliability and support the most common interfaces used in automotive Advanced Driver Assistance System (ADAS) technology and are helping to deliver innovation for infotainment applications. The interface designs include support for DDR/LPDDR, PCI Express (PCIe), MIPI, automotive Ethernet and USB. In addition, Cadence anticipates initial customer deliveries of the first high-speed SerDes and low-latency DDR IP for use with TSMC’s 16FFC process in the fourth quarter of this year.

“TSMC is working closely with Cadence to enable the necessary design IP for our mutual customers building advanced automotive electronic systems, including functions such as ADAS, infotainment, high-fidelity audio and in-car networking,” said Suk Lee, TSMC Senior Director, Design Infrastructure Marketing Division.

“Cadence is making a significant long-term investment in the automotive market segment. Working closely with TSMC, we are delivering IP solutions that meet the needs of our market-leading automotive customers,” said Dino Bekis, Vice President of marketing for the IP group at Cadence. “Our expanding portfolio of 16FFC automotive solutions, as well as our Tensilica® DSPs and Verification IP, will enable automotive OEMs and their suppliers to accelerate development and time-to-market of their next-generation SoCs.”