Xilinx delivers dynamic reconfiguration technology

Xilinx Partial Reconfiguration technology allows designers to change functionality on the fly, eliminating the need to fully reconfigure and re-establish links, dramatically enhancing the flexibility of All Programmable devices.

System upgradeability & reliability are greatly enhanced by providing the ability to update feature sets in deployed systems, fix bugs, and migrate to new standards while critical functions remain active.

“The use of Partial Reconfiguration in Xilinx devices allowed us to optimise the size of the FPGA, and provide complete flexibility to maintain system connectivity while independently reconfiguring multiple ports in our design,” said Craig Palmer, senior engineering manager, Viavi Solutions.

The Partial Reconfiguration technology enables dynamic configurability by swapping portions of the design while the rest remains operational, requiring zero downtime and little impact to cost or development time.

“Partial Reconfiguration of FPGAs is a key element in Keysight’s toolbox for creating the next generation of test and measurement solutions. Partial Reconfiguration enables us to manage the ever increasing need for flexibility and complexity of test systems,” said Tom Vandeplas, senior researcher, Keysight Laboratories, Keysight Technologies.

The Vivado Design Suite HLx Editions 2017.1 release is now available for download. Partial Reconfiguration functionality is now included at no additional cost with the Vivado HL Design Edition and HL System Edition. In-warranty users can regenerate their licenses to gain access to this feature. Partial Reconfiguration is available for Vivado WebPACK Edition at a reduced price.