Renesas Announced Development of Next-Generation 32-Bit V850 CPU core with SIMD Support that Provides Enhanced Signal Processing

The main features of the V850E2H core are: (1) An integrated coprocessor with single instruction multiple data (SIMD) support that allows processing of four units of data to be executed by a single instruction, enabling excellent signal processing performance without the need for an external DSP; and (2) a high-speed branch predictor for rapid execution of loop instructions, so that even programs composed of basic instructions that do not include signal processing will run approximately 10 percent faster. These features make it easier for system designers to incorporate MCUs with built-in V850E2H CPU core into their systems.



In the field of real-time control systems requiring high-speed signal processing, such as FA equipment and automotive control units, a shift to electronics has been advancing rapidly in recent years and demands for faster signal processing are rapidly increasing. Nowadays, high-end embedded systems typically include a DSP for signal processing in addition to a CPU. However, since the CPU must communicate with externally connected devices such as DSPs via low-speed memory devices, it was extremely difficult to maintain the high interrupt responsiveness essential in these fields when changing the processing details in response to interrupts. In addition, such high-end embedded systems require a substantial investment of development man-hours. This is due to the need to create a control program to run on the CPU and a separate signal processing program to run on the DSP, which must be designed and tested using separate development environments and then tested and verified to ensure interoperation between the CPU and DSP.



In response to this demand for better performance and reduced time and resources for development, Renesas Electronics has developed the V850E2v4 architecture, which combines the excellent control performance of existing CPU cores such as the V850E2M with superior signal processing performance. The V850E2v4 architecture boosts both control performance and signal processing performance, surpassing that of the earlier architecture while also offering enhanced basic functions and SIMD extensions for signal processing. The V850E2H is the first CPU core to be based on this new architecture.



The main functions of the V850E2H core are as follows.



(1) SIMD extensions for signal processing performance on par with DSP



SIMD instructions and an SIMD processor with dedicated vector registers (64-bit) have been added to boost signal processing performance. Other improvements on the V850E2M core include a dedicated pipeline for executing signal processing extended instructions and the addition of a compact branch predictor enabling faster execution of loop instructions. These improvements combine to enable signal processing on a par with a conventional DSP and real-time system control, without the need to connect an external DSP to the MCU.



(2) Better performance relative to code size than earlier CPU cores



In a comparison with a filtering program (see Note 1) written in C running on an earlier CPU core, the same program when optimized and compiled for the V850E2H core was only one-third the size and executed in approximately one-twelfth the time. This is a truly dramatic improvement in performance per unit of code size.



Improvements to basic functions such as branch prediction based on the local branch history, loop instructions, and long-distance conditional branch enable the V850E2H core to even execute applications containing no signal processing some 5 to 12 percent faster.



In addition, the V850E2H core executes both basic instructions and signal processing extended instructions in the CPU’s internal pipeline, enabling all instructions to accept interrupts.



(3) Reduction in program development man-hours



Since there is no need for an external DSP, both the control program and the signal processing program can be designed and tested on a program development environment designed for the CPU. This can substantially reduce the man-hours required in comparison with the earlier approach, in which separate development environments were needed for design and testing of the CPU and DSP programs, and final interoperation testing and verification was required as well.



(4) Compatibility with earlier CPU cores



The V850E2H core provides guaranteed compatibility with the basic instruction set of the earlier V850E2M CPU at the object level. In addition, the IEEE 754 compliant floating-point arithmetic unit integrated with the V850E2M core can be integrated with the V850E2H core as well.



Renesas Electronics considers the V850E2H core, which offers both excellent control and signal processing performance, to be a technology that will contribute to the development of programs for control systems requiring sophisticated analysis algorithms, such as vibration damping systems for FA equipment and automotive control units such as knocking sensors that monitor automobile radar and engine fuel efficiency. Utilizing the new V850E2H core, the company plans to offer new MCU solutions to customers.



(Note 1) Program employing 16-bit 128-point fast Fourier transform (FFT).



V850 is a trademark or registered trademark of Renesas Electronics Corp in Japan, China, and Germany. The product names and service names mentioned in this press release are all registered trademarks or trademarks belonging to their respective companies.