PLX Expert to Present on Simplifying PCI Express Debugging at PCI-SIG Developers Conference in Israel

The presentation instructs designers on the most efficient methods of resolving common and complex PCIe-design issues through on-chip diagnostics tools and free software, instead of purchasing expensive analysis lab equipment.

Structured for engineers knowledgeable in PCIe but looking for a deeper understanding of debugging methods for this powerful interconnect technology, Percival’s presentation will explain a wide range of challenges and solutions designers face when finalizing PCIe-based designs, including:

-Initial debugging steps
-Understanding the link training status state machine (LTSSM)
-Debugging with an oscilloscope
-Debugging using registers
-System-level issues
-Bandwidth and payload size

PCI Express is ubiquitous in embedded systems, servers, storage appliances and a variety of other data-center and cloud computing environments, delivering key advantages over alternative interfaces: low power, auto-detection, lane configurability, and robust error detection and correction. Still, designers occasionally need to debug problematic PCIe links. On-chip diagnostics tools found in PLX’s ExpressLane™ PCIe switches -- an embedded packet generator, Rx eye measurement, Tx loopback, error counters, a PRBS generator, and error injector capabilities -- enable engineers to quickly and economically debug designs and help bring them to market in the minimal amount of time.

PLX Switches: Unrivaled Performance, Extending PCIe Outside the Box
The expansive PLX ExpressLane PCIe Gen3 portfolio with these on-chip diagnostics includes 18 switches ranging from a streamlined 12-lane, three-port device to the industry’s only 96-lane, 24-port switch. Designs using the ExpressLane PEX8796 switch (8 Gigatransfers per second, per lane, in full duplex mode) realize throughput of up to 1.5 terabits per second -- performance that rivals all other interconnect technologies. Furthermore, these highly versatile switches are now enabling ExpressFabric technology, a PLX-engineered solution that extends PCIe beyond its current dominant position inside servers, network switches and storage appliances and into the heart of a system fabric. PCIe Gen3 – and eventually Gen4 -- ExpressFabric technology presents designers with the lowest-power and -cost fabric solution, as it eliminates the need for the cumbersome translation of multiple interconnects, thus reducing latency and increasing performance.

Percival has nearly 30 years’ experience in various technical capacities in the semiconductor industry. As senior field applications engineer with PLX Europe, he provides technical support and training to PLX customers in Europe, Africa and the Middle East. Percival holds engineering degrees from the University of Hull, in the United Kingdom.