Altera Extends Its Technology Leadership with the 820K-LE Stratix IV FPGA

Altera's Stratix IV E FPGAs feature four devices ranging in density from 230K to 820K LEs. The new EP4SE820 delivers 53 percent higher density than Altera's EP4SE530 device and is at least one speed grade faster than the closest competitor's largest offering. The density, performance and power-saving features in the EP4SE820 FPGA enable customers to simplify their design partitioning, accelerate their verification cycle, and reduce their total system power.

Increasing the number of LEs in Stratix IV E FPGAs to 820K gives ASIC-prototyping designers the ability to implement much larger ASIC designs on a single FPGA, which simplifies board design and minimizes the number of design partitions. For designers wanting to move their design into an ASIC after FPGA prototyping, Altera offers a low-risk, low-cost migration path to ASIC production with its HardCopy IV ASICs.

One of the most critical issues that designers of high-density FPGAs face is minimizing compile times so they can bring products to market faster. Altera Quartus II design software offers several productivity features to Stratix IV FPGA users that enable faster overall timing closure. Features such as advanced place-and-route algorithms, multiprocessor support and incremental compile reduce customers' compile times two to three times on average when compared to the nearest competitor's 40-nm high-density FPGAs.

“Customers, particularly in the ASIC prototyping and emulation space, demand bigger and faster FPGAs, and we are meeting their demand by offering the industry's largest FPGA,” said Luanne Schirrmeister, senior director of component product marketing at Altera. “The resource-rich EP4SE820 FPGA enables customers to fit more logic into their FPGA so they can deliver greater product differentiation at a lower cost.”