Zynq RFSoC DFE for mass 5G radio deployments

Zynq RFSoC DFE combines hardened digital front-end (DFE) blocks and adaptable logic to build high performance, low power, and cost-effective 5G NR radio solutions for a broad array of use cases ranging across 5G low-, mid-, and high- band spectrum.

Zynq RFSoC DFE offers the best balance of technologies between the cost economies of an ASIC using hardened blocks and the flexibility, scalability, and time-to-market benefits of a programmable and adaptive SoC.

5G radio requires solutions that not only meet bandwidth, power, and cost challenges for widespread deployment, but must also adapt to the three key 5G use cases: enhanced Mobile Broadband, massive Machine Type Communication, and Ultra-Reliable Low-Latency Communication. In addition, solutions must scale for evolving 5G standards such as OpenRAN (O-RAN) as well as new and disruptive 5G business models.

Zynq RFSoC DFE integrates hardened DFE application-specific blocks for 5G NR performance and power savings while also offering the flexibility to integrate programmable adaptive logic to enable a futureproof solution for evolving 5G 3GPP and O-RAN radio architectures.

"For the first time, Xilinx is providing a wireless radio platform with more hardened application-specific IP than adaptive logic to address low power and low cost 5G requirements,” said Liam Madden, Executive Vice President and General Manager, Wired and Wireless Group at Xilinx. “With the market needs around 5G evolving, integrated RF solutions need to be adaptable to address future standards. Zynq RFSoC DFE provides the optimal balance between that adaptability and fixed function IP.”

Zynq RFSoC DFE offers 2X performance-per-watt compared to its prior generation and scales from small cell to massive MIMO macrocells. The solution is the industry’s only direct RF platform that enables carrier aggregation/sharing, multi-mode, multi-band 400MHz instantaneous bandwidth in all FR1 bands, and emerging bands up to 7.125GHz.

When used as a millimetre wave intermediate frequency transceiver, it provides up to 1,600MHz of instantaneous bandwidth. Zynq RFSoC DFE is architected such that customers can bypass or customise the hard IP blocks. For example, customers can leverage Xilinx’s field-proven DPD that supports existing and emerging GaN power amplifiers or insert their own DPD IP.

“As 5G continues to evolve in both commercial deployments and new use cases, it is critical for the supply chain to provide flexible components for vendors to create cost effective, adaptive and future-proof equipment. Open RAN takes this requirement to a much higher level, where flexible designs are paramount to its success,” added Dimitris Mavrakis, Senior Research Director of 5G at ABI Research. “With its balance of hardening and adaptable logic, Zynq RFSoC DFE is a unique offering which combines the cost characteristics typically found in ASICs while providing the design flexibility and customisation available in an FPGA.”

Zynq RFSoC DFE design documentation and support is available to early access customers, with shipments expected during the first half of 2021.